1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, and in particular to a gate electrode using electrically conductive oxide, of an n-type MIS transistor and a p-type MIS transistor.
2. Related Art
A gate electrode a conventional MISFET (Metal Insulator Semiconductor Field Effect Transistor)(hereinafter, called “MIS transistor”) is formed of polycrystal silicon. Because of demand for reducing power consumption, it is common to employ a dual gate structure where n-type polycrystal silicon is used for a gate electrode of an n-type MIS transistor (hereinafter, called “nMIS transistor”) and p-type polycrystal silicon is used for a gate electrode of a p-type MIS transistor (hereinafter, called “pMIS transistor”).
In the dual gate structure, there is a problem about “boron punch through” where boron contained in the p-type polycrysal silicon diffuses into a silicon substrate through a gate insulating film. Further, since the polycrystal silicon produces a depletion layer in an interface between the same and the gate insulating film, a film thickness of the gate insulating film equivalent to an SiO2 film becomes thicker in an amount of about 0.5 nm. In current situation where development is directed for achieving the SiO2 equivalent film thickness of the gate insulating film of 1 nm or less for fineness of a device by such a scheme as advance of film thinning of the gate insulating film or use of a high-k dielectric film in some cases, increase of the above equivalent film thickness causes a much significant problem.
As a method for solving the problem occurring when such polycrystal silicon is used for the gate electrode, it is considered that high melting point metal is used as material for the gate electrode. Since it is unnecessary to introduce boron into the metal gate electrode, the problem about the “boron punch through” does not occur. Since a depletion layer itself is not produced, such a problem that the conversion film thickness becomes larger at an electrode portion is also solved. It is considered that a problem about shift of flat band potential Vfb causing a problem in high-k dielectric HfSiON or the like can be solved by using the metal gate electrode. This is because one of serious causes of shift of the Vfb fluctuated is solved, since a charge trap due to boron disappears.
On the other hand, when gate electrodes for the pMIS and the nMIS are formed in a usual manner using the same metal gate electrode material, there occurs such a problem that a threshold voltage is increased as compared with that of the polycrystal silicon gate electrode. For example, when promising titanium nitride is used as the gate electrode material, it is difficult to lower the threshold voltage down to 0.4V or less, even if an impurity distribution in a surface of the silicon substrate is adjusted. The reason is why, since the work function of titanium nitride is about 4.7 eV and the value is positioned in the vicinity of an central portion of the forbidden band of silicon, a different in work function between the titanium nitride and the pMIS transistor reaches about 0.47 eV and a difference in work function between the titanium nitride and the nMIS transistor reaches about 0.65 eV.
In view of these circumstances, first, such a thought is proposed that the gate electrode of the pMIS transistor and the gate electrode of the nMIS transistor are formed from different kinds of metal materials. For example, this is a thought that iridium or the like which is positioned near an upper limit in the valence band of silicon and whose work function is about 5.2 eV is used as the gate electrode of the pMIS transistor, and zirconium or the like which is positioned near a lower limit of the conduction band of the silicon substrate and whose work function is about 4.1 eV is used as the gate electrode of the nMIS transistor.
1) However, many metals and conductive nitrides themselves are oxidized by bringing them in contact with the gate insulating film which is oxide and an interface property is deteriorated, which causes leakage current. For example, TaN deteriorates at its interface with an insulator in a step conducted at a temperature of 800° C. or higher, which results in increase in leakage current simultaneously with production of oxide. Some oxides develop an insulating property due to material therefor, which results in increase in thickness of the insulating film. For example, in case of Zr, it changes to insulating ZrO2.
2) The metal electrode includes much material with strong catalyst activity. Therefore, there may occur such a serious problem that, when such material, for example, Pt or Ir is used, film peeling-off occurs at another portion (for example, MIM (Metal Insulator Metal) capacitor or the like) in LSI during forming anneal using hydrogen atmosphere.
3) Further, there is a case that a simple metal diffuses in an insulating film or a substrate to distribute unevenly. It is considered that such a metal constitutes a source for destroying insulating property of a gate insulating film. It is to be noted that, when the metal diffuses into the insulating film so as to form metal silicate thereby increasing dielectric constant, properties for an insulating film are improved in some cases. Simultaneously, however, since there is such an indication that electron barrier or hole barrier lowers, the lowering results in slight deterioration in leakage property.
4) Though metal (Ru, Pt, Ir or the like) whose oxide develops electric conductivity is used, the problems described in the above item 2) and 3) still remain. Further, an example where electrically conductive oxide is used for a gate electrode of an nMIS transistor has been known (for example, refer to Japanese Patent Application Laid-open No. 2002-289844 (JP-A)). As described in the next item 5), however, though it is required to select an optimal work function, a combination of these electrically conductive oxides which has work functions suitable for both the nMIS transistor and the pMIS transistor does not exist yet. For example, since the work function of Ru is 4.7 eV and that of RuO2 is in a range of 4.9 to 5.1 eV, an Ru electrode can not be used for the nMIS transistor.
5) Finally, since the work functions must be optimized to the nMIS transistor and pMIS transistor, control based upon nitriding has been tried until now. For example, the work functions of Ti and TiN are respectively 4.1 eV and 4.7 eV, but the work function of TiN is not optimal for the pMIS transistor (for example, refer to Claflin, B; Mater. Res. Soc. Ultrathin SiO2 and High-k Materials for ULSI gate dielectrics 603 (1999)). Further, it is considered that metal post-nitrided is used (Mo, MO2N or the like). In the case, however, there is an indication about a problem that nitrogen can not be present sufficiently stably, and nitrogen is gone out in a heat treatment.
Thus, there is the present situation that a combination of metals or nitrided metals which have optimal work functions as a combination of the nMIS transistor and the PMIS transistor can not be found. There is a trial based upon alloying. For example, regarding a case of using alloy of Ti—Ni, there is a report that a work function thereof can be controlled from 3.9 eV to 5.3 eV (for example, refer to Polishchuk, I; Mater. Res. Soc. Gate Stack and Silicide Issues in Silicon Processing II Symposium PPK511-6 (2002)). In this case, the problems about metals described in the above items 1), 2), and 3) are not solved to remain as they are.